bx stands for branch and exchange instruction set Which means that according to the lsb (least significant bit) of the address to branch to, the processor will treat the next instruction as ARM or as thumb. As lr usually holds the return address, it means that this is a return from a function, and if the lsb of lr is 1, it … Read more
I hope it’s obvious that phase4 is checking that the first number is in the range 0..14 inclusive (see lines +44..+57) Then it invokes func4 with three arguments: the first number entered, 0 and 14 (lines +62..+85). Next it checks that the return value is 0x25 (37 decimal) on line +90 and that the second … Read more
jz is “jump if zero”. cmp subtracts its two operands, and sets flags accordingly. (See here for reference.) If the two operands are equal, the subtraction will result in zero and the ZF flag will be set. So in your sample, the jump will be taken if al was 1, not taken otherwise.
LEA (load effective address) just computes the address of the operand, it does not actually dereference it. Most of the time, it’s just doing a calculation like a combined multiply-and-add for, say, array indexing. In this case, it’s doing a simple numeric subtraction: leal -4(%ebp), %eax just assigns to the %eax register the value of … Read more
From the GAS-manual: An Intel syntax indirect memory reference of the form is translated into the AT&T syntax where base and index are the optional 32-bit base and index registers, disp is the optional displacement, and scale, taking the values 1, 2, 4, and 8, multiplies index to calculate the address of the operand. (https://sourceware.org/binutils/docs/as/i386_002dMemory.html#i386_002dMemory) … Read more
In NASM / Intel syntax, mov r64, 0x… picks a MOV encoding based on the constant. There are four to choose from with immediate operands: 5 byte mov r32, imm32. (zero-extended to fill the 64-bit register like always). AT&T: mov/movl 6+ byte mov r/m32, imm32. only useful for memory destinations. AT&T: mov/movl 7+ byte mov r/m64, sign-extended-imm32. Can store 8 bytes to memory, or set … Read more
Byte: Today, a byte is almost always 8 bit. However, that wasn’t always the case and there’s no “standard” or something that dictates this. Since 8 bits is a convenient number to work with it became the de facto standard. Word: The natural size with which a processor is handling data (the register size). The most common word sizes … Read more
Alignment is important for a MIPS processor, it only likes to read multi-byte values from memory at an address that’s a multiple of the data size. The .ASCIIZ field can be placed anywhere since a string is read one byte at a time. So putting it at 0x10010003 is fine. The .WORD field must be … Read more
Brackets in [ESP+18h] mean that the destination of the MOV is memory location at ESP+18h. As an example, if ESP has value 10000000h, then your destination is memory location 10000018h. DWORD defines ‘size’ of the memory location used for move operation. In you example, you’d be moving 0000000Ah (4 bytes) into memory location ESP+18h. As … Read more
You’re missing a couple of loads, and your store is incorrect: