It’s just call. Use Intel-syntax disassembly if you want to be able to look up instructions in the Intel/AMD manuals. The q operand-size suffix does technically apply (it pushes a 64-bit return address and treats RIP as a 64-bit register), but there’s no way to override it with instruction prefixes. i.e. calll and callw aren’t encodeable in 64-bit mode, so it’s just … Read more
pushing a value (not necessarily stored in a register) means writing it to the stack. popping means restoring whatever is on top of the stack into a register. Those are basic instructions:
A XOR B in english would be translated as “are A and B not equal”. So xor ax, ax will set ax to zero since ax is always equal to itself.
They are not the same, although in some circumstances they will behave alike. The format of the lw instruction is as follows: where RegDest and RegSource are MIPS registers, and Offset is an immediate. It means, load into register RegDest the word contained in the address resulting from adding the contents of register RegSource and the Offset … Read more
Cmpl subtracts -0x10(%ebp) from $0x7 and modifies flags: AF CF OF PF SF ZF. If memory at -0x10(%ebp) equals immediate 0x7 then the flag ZF is set. This is below EBP so it’s probably a local variable, if this is an un-optimized build using EBP as a frame pointer. jne 80484db means that if the two compared numbers are different … Read more
According to my understanding cmpl compares unsigned. It does both, in a way. The difference in signed vs. unsigned is here the usage of the jump instructions. For >, there is ja for unsigned and jg for signed (jump if above and jump if greater). For <, there is jb for unsigned and jl for signed (jump if below and jump if less). To be exact, here … Read more
As others have pointed out, LEA (load effective address) is often used as a “trick” to do certain computations, but that’s not its primary purpose. The x86 instruction set was designed to support high-level languages like Pascal and C, where arrays—especially arrays of ints or small structs—are common. Consider, for example, a struct representing (x, … Read more
AT&T syntax splits the movzx Intel instruction mnemonic into different mnemonics for different source sizes (movzb vs. movzw). In Intel syntax, it’s: i.e. load a byte from memory at eax+ecx+1 and zero-extend to full register. BTW, most GNU tools now have a switch or a config option to prefer Intel syntax. (Such as objdump -Mintel or gcc -S -masm=intel, although the latter affects … Read more
There’s a good guide to x87 FPU by Raymond Filiatreault. Chapter 1 explains how the FPU register stack works. Yes, fld st(0) pushes a copy of the top of the stack. The Intel insn ref manual explicitly mentions this special-case use of fld st(n) I believe you’re right that fstp does pop after the fild. The first fild / fstp pair converts a global int (at L1000F140) to a … Read more
CMP subtracts the operands and sets the flags. Namely, it sets the zero flag if the difference is zero (operands are equal). TEST sets the zero flag, ZF, when the result of the AND operation is zero. If two operands are equal, their bitwise AND is zero when both are zero. TEST also sets the sign flag, SF, when the most … Read more