MIPS assembly for a simple for loop
Your loop goes from 0 to 14, so your bgt instruction should be: bgt $t0,14,exit I think. .
assembly
What’s the size of a QWORD on a 64-bit machine?
In x86 terminology/documentation, a “word” is 16 bits because x86 evolved out of 16-bit 8086. Changing the meaning of the term as extensions were added would have just been confusing, because Intel still had to document 16-bit mode and everything, and instruction mnemonics like cwd (sign-extend word to dword) bake the terminology into the ISA. x86 word = … Read more
What does the BEQ instruction do exactly?
On Motorola 68k family, it stands for “branch if equal” which means “jump to given address if zero flag is set” such as when previous comparison is successful. However, 68332 seems to be different. Based on uppercase syntax, it could be a macro around another instruction which essentially does the same thing. Assembly programmers who … Read more
What is callq instruction?
It’s just call. Use Intel-syntax disassembly if you want to be able to look up instructions in the Intel/AMD manuals. The q operand-size suffix does technically apply (it pushes a 64-bit return address and treats RIP as a 64-bit register), but there’s no way to override it with instruction prefixes. i.e. calll and callw aren’t encodeable in 64-bit mode, so it’s just … Read more
C to assembly – leaq instruction
https://web.cecs.pdx.edu/~kimchris/cs201/slides/10%20-%20×86%20Basics,%20Part%202.pdf simple explanation it moves the address not the values
What is the function of the push / pop instructions used on registers in x86 assembly?
pushing a value (not necessarily stored in a register) means writing it to the stack. popping means restoring whatever is on top of the stack into a register. Those are basic instructions:
What is the meaning of XOR in x86 assembly?
A XOR B in english would be translated as “are A and B not equal”. So xor ax, ax will set ax to zero since ax is always equal to itself.
MIPS: lw (load word) instruction
They are not the same, although in some circumstances they will behave alike. The format of the lw instruction is as follows: where RegDest and RegSource are MIPS registers, and Offset is an immediate. It means, load into register RegDest the word contained in the address resulting from adding the contents of register RegSource and the Offset … Read more
x86 cmpl and jne
Cmpl subtracts -0x10(%ebp) from $0x7 and modifies flags: AF CF OF PF SF ZF. If memory at -0x10(%ebp) equals immediate 0x7 then the flag ZF is set. This is below EBP so it’s probably a local variable, if this is an un-optimized build using EBP as a frame pointer. jne 80484db means that if the two compared numbers are different … Read more
The difference between cmpl and cmp
According to my understanding cmpl compares unsigned. It does both, in a way. The difference in signed vs. unsigned is here the usage of the jump instructions. For >, there is ja for unsigned and jg for signed (jump if above and jump if greater). For <, there is jb for unsigned and jl for signed (jump if below and jump if less). To be exact, here … Read more