register-transfer-level - Read For Learn

$display vs $strobe vs $monitor in verilog?

I’ll be nice and summarize the LRM (Language Reference Manual), but you should read it. Everything is in IEEE Std 1800-2012 § 21.2 Display system tasks (Technically SystemVerilog, but these functions are identical.) $display : print the immediate values § 21.2.1 The display and write tasks $strobe : print the values at the end of … Read more

XOR signal in verilog

There are a couple of ways of doing this. One way could be to build a 4-input XOR module, and then instantiate multiple copies. Another way would be to use a for-loop. This won’t work with all the cases, since you don’t have an evenly-divisible number of wires. There are some other tricks (like 0-padding … Read more