No, that’s not quite right.
EAX is the full 32-bit value AX is the lower 16-bits AL is the lower 8 bits AH is the bits 8 through 15 (zero-based)
So AX is composed of AH:AL halves, and is itself the low half of EAX. (The upper half of EAX isn’t directly accessible as a 16-bit register; you can shift or rotate EAX if you want to get at it.)
For completeness, in addition to the above, which was based on a 32-bit CPU, 64-bit Intel/AMD CPUs have
RAX, which hold a 64-bit value, and where EAX is mapped to the lower 32 bits.
All of this also applies to EBX/RBX, ECX/RCX, and EDX/RDX. The other registers like EDI/RDI have a DI low 16-bit partial register, but no high-8 part, and the low-8 DIL is only accessible in 64-bit mode: Assembly registers in 64-bit architecture
Writing AL, AH, or AX leaves other bytes unmodified in the full AX/EAX/RAX, for historical reasons. i.e. it has to merge a new AL into the full RAX, for example. (In 32 or 64-bit code, prefer a movzx eax, byte [mem] or movzx eax, word [mem] load if you don’t specifically want this merging: Why doesn’t GCC use partial registers?)
Writing EAX zero-extends into RAX. (Why do x86-64 instructions on 32-bit registers zero the upper part of the full 64-bit register?)
Again, all of this applies to every register, not just RAX. e.g. writing DI or DIL merges into the old RDI, writing EDI zero-extends and overwrites the full RDI. Same for R10B or R10W writes merging, writing R10D leaving R10 independent of the old R10 value.